• DocumentCode
    3679162
  • Title

    Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture

  • Author

    Sophiane Senni;Lionel Torres;Gilles Sassatelli;Abdoulaye Gamatie;Bruno Mussard

  • Author_Institution
    Univ. of Montpellier, Montpellier, France
  • fYear
    2015
  • fDate
    7/1/2015 12:00:00 AM
  • Firstpage
    460
  • Lastpage
    460
  • Abstract
    Most die area of today´s systems-on-chips is occupied by memories. Hence, a significant proportion of total power is spent on memory systems. Moreover, since processing elements have to be fed with instructions and data from memories, memory plays a key role for system´s performance. As a result, memories are a critical part of future embedded systems. Continuing CMOS scaling leads to manufacturing constraints and power consumption issues for the current three main memory technologies, i.e. SRAM, DRAM and FLASH, which compromises further evolution in upcoming technology node. To face these challenges, new non-volatile memory technologies emerged in recent years. Among these technologies, magnetic RAM (MRAM) is a promising candidate to replace existing memories since it combines non-volatility, high scalability, high density, low latency, and low leakage. This paper describes an evaluation flow to explore next generation of the memory hierarchy of processor-based systems using new non-volatile memory technologies.
  • Keywords
    "Random access memory","Energy consumption","Nonvolatile memory","Memory management","Magnetic tunneling","Bandwidth"
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2015 IEEE Computer Society Annual Symposium on
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2015.126
  • Filename
    7309612