DocumentCode :
3679176
Title :
Using Configurable Bit-Width Voters to Mask Multiple Errors in Integrated Circuits
Author :
Ló;Fernanda Lima Kastensmidt;Antonio Carlos Schneider Beck
Author_Institution :
Dept. de Ensino, Pesquisa e Extensao, Inst. Fed. de Educ., Charqueadas, Brazil
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
533
Lastpage :
538
Abstract :
N-Modular Redundancy (NMR) with majority voters has been widely used to increase reliability. While bit-voters perform bit by bit comparisons, which are the most basic and fast voting scheme, word-voters consider all bits in parallel to determine the final output, increasing data integrity but likewise the area. This paper proposes to merge the advantages of both aforementioned voters and fill the gap in between the existent designs, by grouping voters into a structure of configurable sets of bits (i.e.: The proposed system is composed of a set of X voters of Y bits, where X and Y are configurable). We explore the design space by considering scenarios with multiple errors and project restrictions such as area, delay, error rate, number of modules, and probability of corrupt outputs. We will show that there are many cases where the proposed voter fits the aforementioned restrictions better than the others.
Keywords :
"Nuclear magnetic resonance","Redundancy","Delays","Single event upsets","Circuit faults","Tunneling magnetoresistance"
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2015 IEEE Computer Society Annual Symposium on
Type :
conf
DOI :
10.1109/ISVLSI.2015.65
Filename :
7309626
Link To Document :
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