Flexible Ultra-Low-Voltage CMOS Circuit Design Applicable for Digital and Analog Circuits Operating below 300mV

A generic ultra low-voltage (ULV) CMOS design approach is presented. By applying a floating capacitor to the gate terminal of the enhanced driving transistors, obtained by using a charge injection technique, we may change the ON and OFF currents. The delay in circuits where the enhanced transistors are utilized can be reduced significantly compared to complementary CMOS. The current level of the transistors may be increased for high speed and decreased for low power applications. The design approach may be used to implement ultra low-voltage and high-speed digital logic and Flip-Flops. In addition, the generic technique can be used to implement multiple-valued and analog ultra low-voltage CMOS circuits. For ultra low-voltage digital applications the delay may be reduced to less than 10% compared to static CMOS. The high speed Flip-FLOP presented shows a similar increase in speed compared to conventional Flip-Flops for low supply voltages. For the analog circuit presented the increased current level is used to obtain rail-to-rail operation at higher frequencies than conventional analog circuits.