• DocumentCode
    3682181
  • Title

    Sub-sircuit model of fully-depleted double-gate FinFET including the effects of oxide and interface trapped charge

  • Author

    Tatjana Pesic-Brdjanin;Nebojsa Jankovic

  • Author_Institution
    University of Banja Luka, Faculty of Electrical Engineering, Bosnia and Herzegovina
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, a method for including the effects of oxide and interface trapped charge in standard SPICE model of fully-depleted double-gate FinFET is described. It is based on the auxiliary sub-circuit connected in series with the gate input of FinFET which accounts for the bias-dependent voltage shifts due to the trapped charge. The sub-circuit model efficiency is verified using two-dimensional TCAD device simulations.
  • Keywords
    "FinFETs","Silicon","Semiconductor device modeling","Integrated circuit modeling","SPICE","Logic gates","Standards"
  • Publisher
    ieee
  • Conference_Titel
    EUROCON 2015 - International Conference on Computer as a Tool (EUROCON), IEEE
  • Type

    conf

  • DOI
    10.1109/EUROCON.2015.7313741
  • Filename
    7313741
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3682181