• DocumentCode
    3682266
  • Title

    A 78.8–92.8 GHz 4-bit 0–360° active phase shifter in 28nm FDSOI CMOS with 2.3 dB average peak gain

  • Author

    Domenico Pepe;Domenico Zito

  • Author_Institution
    Tyndall National Institute, Cork, Ireland
  • fYear
    2015
  • Firstpage
    64
  • Lastpage
    67
  • Abstract
    A 78.8-92.8 GHz 4-bit (16 phases) digitally controlled vector modulator active phase shifter has been designed and implemented in 28nm FDSOI CMOS by STMicroelectronics. The phase shifter exploits a novel IQ generator based on a cascode amplifier incorporating a lumped element coupled line quadrature coupler to generate the in-phase (I) and quadrature (Q) signals. The phase shifter consumes 18 mA from a 1.2 V supply. The measured performances are: average gain of 2.3 dB at 87.4 GHz (between 3.2 and -1.6 dB for the 16 phase states) and -3 dB bandwidth (B3dB) from 78.8 to 92.8 GHz; RMS gain error equal to 1.68 dB at 87.4 GHz and lower than 2 dB in the B3dB; RMS phase error equal to 9.4o at 87.4 GHz and lower than 11.9o in the B3dB; S11 lower than -10.5 dB in the B3dB; average input referred 1 dB compression point of -7 dBm (between -8 and -5 dBm for the 16 phase states); average noise figure equal to 10.8 dB at 87 GHz (between -9 and -12 dB for the 16 phase states).
  • Keywords
    "Phase shifters","Noise measurement","Gain","Phase measurement","CMOS integrated circuits","Couplers","Gain measurement"
  • Publisher
    ieee
  • Conference_Titel
    European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4673-7470-5
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2015.7313829
  • Filename
    7313829