• DocumentCode
    36824
  • Title

    Randomized Multitopology Logic Against Differential Power Analysis

  • Author

    Avital, Moshe ; Dagan, Hadar ; Keren, Osnat ; Fish, Alexander

  • Author_Institution
    Fac. of Eng., Bar-Ilan Univ., Ramat-Gan, Israel
  • Volume
    23
  • Issue
    4
  • fYear
    2015
  • fDate
    Apr-15
  • Firstpage
    702
  • Lastpage
    711
  • Abstract
    Side channel attacks have become one of the most significant problems in modern digital systems. In particular, differential power analysis (DPA) has emerged as a powerful technique because it does not require any assumptions regarding the hardware implementation of a crypto-chip. In this paper, a new randomized multitopology logic (RMTL) is proposed to enhance immunity to DPA. RMTL refers to a family of dedicated security-oriented gates whose power profile cannot be predicted by external observers. Specifically, each gate of this logic can be configured in real time to operate in a different circuit topology, where each topology induces a different power profile. Immunity to DPA attacks is obtained by randomly changing each gate´s topology on run time. The suggested approach can coexist with common existing countermeasures. Theoretical analysis and simulation results, conducted in a standard 40-nm technology, clearly show higher immunity to DPA attacks when using the proposed approach compared with standard CMOS implementation.
  • Keywords
    cryptography; digital systems; logic gates; network topology; DPA attack immunity; RMTL; circuit topology; cryptochip; differential power analysis; digital system; logic gate; power profile; randomized multitopology logic; security-oriented gate; side channel attack; size 40 nm; CMOS integrated circuits; Logic gates; Network topology; Power demand; Signal to noise ratio; Standards; Topology; Advanced encryption standard (AES); differential power analysis (DPA); random number generator (RNG); randomized multitopology logic (RMTL); randomized multitopology logic (RMTL).;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2014.2320154
  • Filename
    6825857