Filtering dirty data in DRAM to reduce PRAM writes

Phase-change RAM (PRAM) is a promising candidate of emerging memory technologies which provides large capacity and low leakage power to compensate for the limitations of DRAM in the hybrid DRAM/PRAM memory subsystem. However, for practical applications of PRAM in the hybrid main memory, we need to reduce write traffics to PRAM in order to overcome the write-related limitations in PRAM such as write endurance. In our work, we propose a concept called in-DRAM write buffer for the hybrid main memory to reduce PRAM write traffics. The cache line-level dirty data are filtered out from the evicted DRAM row and stored in the write buffer which occupies a portion of DRAM by sacrificing the capacity of DRAM cache. In order to reduce PRAM writes, the write buffer tries to maximize write coalescing by avoiding the PRAM write-back of soon-to-be-accessed dirty data. In order to adapt to the dynamically changing program behavior in PRAM writes, we also propose a method to adjust the write buffer size dynamically during runtime. Experimental results show that the proposed dynamic method offers up to 91.92% reduction in PRAM writes and gives results (average 14.81% and 9.47% reduction in PRAM writes and program runtime, respectively) comparable to the best of static write buffer size cases.