Workshop and panel discussions [6 abstracts]

Abstracts are provided for the following six panel discussions: "Strategies to Address Latch-up Test Program Complexity in Advanced Mixed Signal ICs," "Best Practices for ESD Robust SoC Integration of Commercial IP," "Implications of the New ANSI/ESD S2020 Specification," "What Should Foundries Include in Their PDKs to Better Support Custom ESD Design?," "Is HBM-IOOOV/CDM-2S0V Now the Industry Default Qualification Target for IC Components?," and "Component System Level ESD Design; Efforts by Auto Tier 1´s to Define Standard Tests." A record of the panel discussion was not made available for publication as part of the conference proceedings.