DocumentCode
3683138
Title
ESD protection design in active-lite interposer for 2.5 and 3D systems-in-package
Author
Mirko Scholz;Geert Hellings; Shih-Hung Chen;Dimitri Linten;Mikael Detalle;Cesar Roda Neve;A. Shibkov;Antonio La Manna;Geert van der Plas;Eric Beyne
Author_Institution
imec, Leuven, Belgium
fYear
2015
Firstpage
1
Lastpage
10
Abstract
Adding low-cost front-end processing to a passive interposer process flow enables the low-cost processing of diodes, SCRs and bipolar transistors. Using those devices in an ESD protection design allows moving a large part of the ESD protection from the stacked die to the interposer.
Keywords
"Electrostatic discharges","Silicidation","Anodes","Cathodes","Silicides","Stress","Capacitance"
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2015 37th
Type
conf
DOI
10.1109/EOSESD.2015.7314774
Filename
7314774
Link To Document