Active clamps with hybrid BJT-CMOS operation mode

A method to exploit the internal gain of the parasitic bipolar transistor in integrated LDMOS devices achieving a mixed bipolar-CMOS regime is proposed and validated using numerical simulation and experimental results. An improvement of active protection clamps in ESD component, HMM, and surge operation regime is demonstrated. The same principle for NLDMOS device in mixed bipolar-CMOS in linear regime is further demonstrated and applied for power stages.