• DocumentCode
    3683230
  • Title

    Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays

  • Author

    Adedotun A. Adeyemo;Jimson Mathew;Abusaleh M. Jabir;Dhiraj K. Pradhan

  • Author_Institution
    Department of Computing and Communication Technologies, Oxford Brookes University, UK
  • fYear
    2015
  • Firstpage
    17
  • Lastpage
    20
  • Abstract
    In an effort to reduce the overall read/write power consumption in emerging memory technologies, efficient read/write schemes have recently attracted increased attention. Among these emerging technologies is the memristor-based resistive random access memory (ReRAM) with simpler structures and capability of producing highly dense memory through the sneak-path prone crossbar architecture. In this paper, a multiple-cells read solution to reduce the overall energy consumption when reading from a memory array is considered. A closed form expression for the noise margin effect is derived and analysis shows that there is zero sneak-path when sensing certain patterns of stored data. The multiple-cells readout method was thus used to analyse an energy efficient Inverted-Hamming (I-H) architecture capable of detecting and correcting single-bit write error in memristor-based memory array.
  • Keywords
    "Resistance","Arrays","Memristors","Integrated circuit modeling","Encoding","Analytical models"
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2015 IEEE International Symposium on
  • Type

    conf

  • DOI
    10.1109/DFT.2015.7315129
  • Filename
    7315129