DocumentCode :
3683255
Title :
Impact of test compression on power supply noise control
Author :
Tengteng Zhang;D.M.H. Walker
Author_Institution :
Department of Computer and Science Engineering, Texas A&
fYear :
2015
Firstpage :
161
Lastpage :
166
Abstract :
Compaction and compression are commonly used to minimize test data volume and test application time. Both techniques can greatly affect power supply noise (PSN) during test, as these techniques take advantage of the fact that test patterns have low care-bit density. However, there is little prior work studying how compression affects PSN. In this work, embedded deterministic test (EDT) and Illinois Scan patterns are generated with and without compaction. Our previous PSN control algorithm is extended to incorporate the compression constraints and applied to these patterns. The experimental results show that with the PSN control algorithm, EDT lowers the maximal PSN by 24.15% and Illinois Scan lowers it by 2.77% on un-compacted patterns. The maximal PSN is 22.32% and 6.94% lower on compacted patterns.
Keywords :
"Decision support systems","Fault tolerance","Fault tolerant systems","Very large scale integration","Nanotechnology","Discrete Fourier transforms"
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2015 IEEE International Symposium on
Type :
conf
DOI :
10.1109/DFT.2015.7315155
Filename :
7315155
Link To Document :
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