VLSI implementation of current mode analog multiplier

This paper presents low-voltage, low power current-mode analog multiplier/divider circuit, which is based on current-mode squaring circuit. The trans linear loop is the basic circuit in the realization of MDC (multiplier/divider circuit). Current mode operation has advantage of simple circuitry. The circuit complexity is reduced by reusing MOS transistor for both the squaring circuits. The proposed MDC is designed for implementing in 0.18um CMOS technology, with low voltage(supply voltage of 1.2 V) and low power operation. The circuit power consumption is 317uW.