• DocumentCode
    3687567
  • Title

    An avoidance technique for mitigating the integer boundary spur problem in a DDS-PLL hybrid frequency synthesizer

  • Author

    R. Vishnu; Anulal S. S.

  • Author_Institution
    Broadcast and Communication Group, Centre for Development of Advanced Computing, Trivandrum, India
  • fYear
    2015
  • fDate
    4/1/2015 12:00:00 AM
  • Firstpage
    443
  • Lastpage
    446
  • Abstract
    Modem frequency hopping radios makes use of Direct Digital Synthesis (DDS) - Phase Locked Loop (PLL) hybrid architecture based frequency synthesizers. The advantage is the fast switching speed and fine tuning resolution of the DDS, complemented with very low phase noise and spurious performance of the PLL. Integer boundary spur is a problem area, which restrict the spurious performance of the DDS-PLL translation loop. An algorithm was developed which identifies whether the tuned frequency is prone to integer boundary spurs. If it is, then the DDS and PLL frequencies are configured such that the generated spurs are outside the loop filter bandwidth, so that they are attenuated by the loop. The algorithm runs as a sub-routine in the micro-controller which programs the DDS and PLL. This algorithm was developed and tested on a wideband frequency synthesizer operating from 600-1200MHz, albeit the method is independent of frequency of operation.
  • Keywords
    "Synthesizers","Mixers","Microcontrollers","Frequency synthesizers"
  • Publisher
    ieee
  • Conference_Titel
    Communications and Signal Processing (ICCSP), 2015 International Conference on
  • Type

    conf

  • DOI
    10.1109/ICCSP.2015.7322927
  • Filename
    7322927