Improving IEEE 1588 synchronization accuracy in 1000BASE-T systems

This paper describes research into improving IEEE 1588 synchronization accuracy when using 1000BASE-T, Gigabit Ethernet over copper wiring. It describes the possible sources of error in such a system, such as path asymmetries and non-deterministic delays, and proposed solutions for them. The methods described improve synchronization accuracy by enhancing the accuracy of timestamps of both ingress and egress 1588 event messages. The clocking architecture of the physical layer for 1000BASE-T, including the master and slave modes of operation, is discussed in detail. The enhancement methods described maintain full compatibility with current IEEE 1588-2008 implementations.