DocumentCode
3688981
Title
Technology and design of GaN power devices
Author
P. Moens;A. Banerjee;P. Coppens;A. Constant;P. Vanmeerbeek;Z. Li;F. Declercq;L. De Schepper;H. De Vleeschouwer;C. Liu;B. Padmanabhan;W. Jeon;J. Guo;A. Salih;M. Tack
Author_Institution
ON Semiconductor, Oudenaarde, Belgium
fYear
2015
Firstpage
64
Lastpage
67
Abstract
This paper reports on the technology and design aspects of an industrial DHEMT process for 650V rated GaN-on-Si power devices, using an in-situ MOCVD grown SiN as surface passivation and gate dielectric, with low interface state density and excellent TDDB. Optimization of the GaN epi stack results in very low off-state leakage (<;10nA/mm). Due to the reduction of buffer trapping, low dynamic Ron (<;10%) is obtained, both at room temperature and at high temperature.
Keywords
"Gallium nitride","Logic gates","Silicon compounds","Aluminum gallium nitride","Wide band gap semiconductors","HEMTs","Dielectrics"
Publisher
ieee
Conference_Titel
Solid State Device Research Conference (ESSDERC), 2015 45th European
ISSN
1930-8876
Print_ISBN
978-1-4673-7133-9
Electronic_ISBN
2378-6558
Type
conf
DOI
10.1109/ESSDERC.2015.7324714
Filename
7324714
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