DocumentCode
3689008
Title
Interplay between hot carrier and bias stress components in single-layer double-gated graphene field-effect transistors
Author
Yury Illarionov;Michael Waltl;Anderson Smith;Sam Vaziri;Mikael Ostling;Max Lemme;Tibor Grasser
Author_Institution
Institute for Microelectronics (TU Wien), 27-29 Gusshausstrasse, 1040 Vienna, Austria
fYear
2015
Firstpage
172
Lastpage
175
Abstract
We examine the interplay between the degradations associated with the bias-temperature instability (BTI) and hot carrier degradation (HCD) in single-layer double-gated graphene field-effect transistors (GFETs). Depending on the polarity of the applied BTI stress, the HCD component acting in conjuction can either accelerate or compensate the degradation. The related phenomena are studied in detail at different temperatures. Our results show that the variations of the charged trap density and carrier mobility induced by both contributions are correlated. Moreover, the electron/hole mobility behaviour agrees with the previously reported attractive/repulsive scattering asymmetry.
Keywords
"Stress","Graphene","Degradation","Transistors","Logic gates","Charge carrier processes","Performance evaluation"
Publisher
ieee
Conference_Titel
Solid State Device Research Conference (ESSDERC), 2015 45th European
ISSN
1930-8876
Print_ISBN
978-1-4673-7133-9
Electronic_ISBN
2378-6558
Type
conf
DOI
10.1109/ESSDERC.2015.7324741
Filename
7324741
Link To Document