DocumentCode :
3689019
Title :
Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model
Author :
J. Pelloux-Prayer;M. Cassé;F. Triozon;S. Barraud;Y.-M. Niquet;J.-L. Rouvière;O. Faynot;G. Reimbold
Author_Institution :
CEA, LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble, France |
fYear :
2015
Firstpage :
210
Lastpage :
213
Abstract :
The effect of strain on carrier mobility in triple gate FDSOI nanowires is experimentally investigated through piezoresistance measurements. We propose an empirical model based on simple assumptions that allows fitting the piezoresistive coefficients as well as the carrier mobility for various device geometries. We highlight an enhanced strain effect for Trigate nanowires with channel height below 11nm.
Keywords :
"Piezoresistance","Silicon","FinFETs","Strain","Semiconductor device modeling","Logic gates"
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference (ESSDERC), 2015 45th European
ISSN :
1930-8876
Print_ISBN :
978-1-4673-7133-9
Electronic_ISBN :
2378-6558
Type :
conf
DOI :
10.1109/ESSDERC.2015.7324752
Filename :
7324752
Link To Document :
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