Synthesis of hardware components for vertical-group parallel neural networks

The model and structure of formal neuron with vertical-group multiplexing of data bus have been developed, which provides coordination of data flow intensity with computing ability of neural element by changing bit-width of channel and number of digits in a group of factors that simultaneously analyzed for the formation of partial products. The main stages and methods of synthesis of parallel vertical neuro element of group type with high efficiency of equipment use have been reviewed.