• DocumentCode
    3689830
  • Title

    Sub-90nm pitch Cu low-k interconnect etch solution using RF pulsing technology

  • Author

    J H Liao;Yu Tsung Lai;Stan Wan;Brandon Kuo;Prabhakara Gopaladasu;David Wei;Sean Yao;Wesley Lin;Ivan Wang;Paul Lin;Barrett Finch;Shashank Deshmukh

  • Author_Institution
    Advanced Etch Department, United Microelectronics Corp., Tainan, Taiwan. R.O.C.
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    131
  • Lastpage
    134
  • Abstract
    Self-aligned via (SAV) schemes are commonly used for back-end-of-line (BEOL) interconnect structures that have scaled to <; 90nm BEOL pitch [1]. In one implementation of this scheme, a TiN metal hard mask (MHM) is used for trench pattern definition, while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work, we describe a SAV etch process using RF pulsing in a capacitively coupled etch reactor that provides a solution to both via distortion / striation and critical dimension (CD) bias loading. Electrical results will be discussed.
  • Keywords
    "Distortion","Loading","Optimization","Plasmas","Strips"
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM), 2015 IEEE International
  • ISSN
    2380-632X
  • Electronic_ISBN
    2380-6338
  • Type

    conf

  • DOI
    10.1109/IITC-MAM.2015.7325638
  • Filename
    7325638