DocumentCode
3692086
Title
Benchmark analysis of AWGR-based optical tiled architectures for multi-socket HPC boards
Author
Paolo Grani;Roberto Proietti;S. J. Ben Yoo
Author_Institution
Department of Electrical and Computer Engineering, University of California, Davis, CA, 95616, USA
fYear
2015
Firstpage
354
Lastpage
356
Abstract
We analyze the execution time and energy performance of tiled optical multi-socket HPC boards with all-to-all AWGR-based interconnection and with different optimizations techniques under PARSEC benchmarking traffic, and we compare it with a state-of-the-art electronic multi-socket architecture. Benchmark results show significant performance improvements and up to 2× energy saving when using dynamic variable bandwidth communication technique.
Keywords
"Optical interconnections","Optical switches","Program processors","Optical resonators","Optical fibers","Optical buffering"
Publisher
ieee
Conference_Titel
Photonics in Switching (PS), 2015 International Conference on
Type
conf
DOI
10.1109/PS.2015.7329051
Filename
7329051
Link To Document