DocumentCode
3694825
Title
Key parameters of BiMOS ESD protection device for UTBB FDSOI advanced technology
Author
S. Athanasiou;S. Cristoloveanu;P. Galy
Author_Institution
STMicroelectronics, 850 rue Jean Monnet, 38920, Crolles, France
fYear
2015
Firstpage
1
Lastpage
3
Abstract
We investigate the impact of carrier mobility on the performance of a novel Bipolar MOS (BiMOS) device fabricated in Ultra-Thin Body & BOX (UTBB) FDSOI technology. BiMOS transistor combines bipolar and MOS mechanisms that are trigerred by front-gate, back-gate and body biasing. The device response was studied under Average Current Slope (ACS) stress. The mobility value, which depends on channel material and ground-plane implants, primarily affects the breakdown voltage and the device self-heating.
Keywords
"BiCMOS integrated circuits","Electrostatic discharges","Transistors","Performance evaluation","Stress","Implants","Decision support systems"
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
Type
conf
DOI
10.1109/S3S.2015.7333482
Filename
7333482
Link To Document