Monolithic three-dimensional integration for memory scaling and neuromorphic computing

This paper explores some key applications and constraints for monolithic three-dimensional integration. We argue that there is a sweet spot at the few μm pitch level for applications that are extremely fault tolerant and repairable for wafer level stacking. We argue that memory especially DRAM and processing in memory are ideal applications and that if we are able to overcome the technology an architectural challenges wafer level Monolithic 3D has a promising future.