Analysis and compensation of Dead-time effect in multi-level diode clamped VSI based on simplified SVPWM

This study describes a detailed analysis and uniform compensation of dead-time effect in three-phase multi-level (N≥3) diode clamped voltage source inverter (DCVSI). To prevent a short circuit in the dc-link, a switching delay time is needed to insert into pulse width modulation (PWM) signals. Due to the dead time, the waveform of output current emerges distortion and increases total harmonic distortion (THD). Dead time compensation is necessary to optimize current distortion and reduce THD. Through analysis of dead time effect, deviations of voltage vectors caused by dead time effect are dependent on the direction of output currents. The voltage distortion increases harmonic components of output voltage and decreases control performance. Combined with the characteristics of simplified SVPWM, in order to avoid determining the direction of output currents, an approximate compensation method for dead time effect is suggested. The value of dead time is adjusted on-line by the value of corresponding phase current. The deviation of voltage vectors caused by dead time effect is directly compensated to three phase reference voltages. This dead time compensation method is suitable to multi-level DCVSI. Simulation results indicate that the proposed scheme can effectively improve the sinusoidal waveform and phase offset of the output current. The algorithm is simple to understand and easy to digital realization.