DocumentCode :
3695832
Title :
GTL based Internet of Things enable processor specific RAM design on 65nm FPGA
Author :
A. Moudgil;K. Garg;B. Pandey;D M Akbar Hussain;Bhagwan Das;M.F.L. Abdullah
Author_Institution :
Department of Computer Science, Chitkara University, Chandigarh, India
fYear :
2015
Firstpage :
133
Lastpage :
136
Abstract :
In this work, we Energy Efficient Internet of Things (IoTs) Enable RAM is presented. In order to make it energy efficient, used Gunning Transceiver Logic (GTL) IO Standard and Gunning Transceiver Logic Plus (GTLP). We used the 4 different members of GTL and GTLP IO standards family and searched the most energy efficient among them. We observed that when we use 3.6 GHz operating frequency, there is 90.2% reduction in I/O power when we used GTL instead of GTLP_DCI. We have inserted a 128-bit IP address in RAM to make internet of things enable RAM. Finally, we operated our IOTs Enable RAM with different operating frequency of I3, I5, I7, Moto-E and Moto-X.
Keywords :
"Random access memory","Power dissipation","Standards","Energy efficiency","Clocks","Field programmable gate arrays","Internet of things"
Publisher :
ieee
Conference_Titel :
ELMAR (ELMAR), 2015 57th International Symposium
Print_ISBN :
978-953-184-209-9
Type :
conf
DOI :
10.1109/ELMAR.2015.7334514
Filename :
7334514
Link To Document :
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