DocumentCode :
3697125
Title :
Design and Evaluation of a Low-Latency AVB Ethernet Endpoint Based on ARM SoC
Author :
Christian Herber;Ammar Saeed;Andreas Herkersdorf
Author_Institution :
Inst. for Integrated Syst., Tech. Univ. Munchen, Munich, Germany
fYear :
2015
Firstpage :
1128
Lastpage :
1134
Abstract :
Communication requirements in automotive electronics are steadily increasing. To satisfy this demand and enable future automotive embedded architectures, new interconnect technologies are needed. Audio Video Bridging (AVB) Ethernet is a promising candidate to accomplish this as it features time-sensitive and synchronous communication in combination with high bit rates. However, there is a lack of commercial products as well as research regarding AVB-capable system-on-chips (SoCs). In this paper, we investigate how and at what cost a legacy Ethernet MAC can be enhanced into an AVB Ethernet controller. Using FPGA prototyping and a real system based on an ARM Cortex-A9 SoC running Linux, we conducted a series of experiments to evaluate important performance metrics and to validate our design decisions. We achieved frame release latencies of less than 6 μs and time-synchronization with an endpoint-induced inaccuracy of up to 8 μs.
Keywords :
"Synchronization","Hardware","Automotive engineering","Software","Random access memory","Field programmable gate arrays","Linux"
Publisher :
ieee
Conference_Titel :
High Performance Computing and Communications (HPCC), 2015 IEEE 7th International Symposium on Cyberspace Safety and Security (CSS), 2015 IEEE 12th International Conferen on Embedded Software and Systems (ICESS), 2015 IEEE 17th International Conference on
Type :
conf
DOI :
10.1109/HPCC-CSS-ICESS.2015.52
Filename :
7336320
Link To Document :
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