Design of all-passive higher-order CMOS N-path filters

In this paper, a methodology for designing all-passive higher-order N-path filters is described. The methodology extends known filter synthesis techniques for LC filters to N-path filters through the use of lumped quarter-wave transmission-line (t-line) equivalents that enable series-LC-like N-path structures. The quarter-wave t-line equivalents also isolate N-path filters from each other, allowing N-path sections to be cascaded to realize filters of arbitrary order. A tunable, nominally 6th-order, high-Q N-path bandpass filter based on this methodology has been implemented in 65nm CMOS. The filter has an insertion loss of 4.7–6.2dB, a tuning range of about 35% from 600MHz to 850MHz, and bandwidth that ranges from 9–15MHz, resulting in a Q that ranges from 40–90. The filter achieves an out-of-band (OOB) rejection of 30–50 dB, input-referred in-band (IB) and OOB 1dB compression point of 0dBm and +14dBm, and input-referred IB and OOB IIP3 of +7 and +17.5dBm respectively. The clock path DC power consumption at 700MHz is 75mW from a 1.2V supply.