DocumentCode
3697885
Title
Digital pulse-width pulse-position modulator in 28 nm CMOS for carrier frequencies up to 1 GHz
Author
Johannes Digel;Markus Grözing;Martin Schmidt;Manfred Berroth;Christoph Haslach
Author_Institution
Institute of Electrical and Optical Communications Engineering, University of Stuttgart, Germany
fYear
2015
fDate
5/1/2015 12:00:00 AM
Firstpage
99
Lastpage
102
Abstract
A fully digital pulse-width pulse-position modulator (D-PWPM) is proposed that is capable of providing pulse sequences for a switching-mode power amplifier. The pulse sequences are generated according to 6-bit digital input words defining the positions of the rising and falling edges without the need for tunable analog delay cells. All possible edge positions are derived by division and phase interpolation of a digital input clock signal that is a multiple of the carrier frequency. CMOS selectors provide two signals which carry the actual rising and falling edge positions to special symmetric CMOS NOR and NAND gates. They finally generate the modulated pulse sequence. The D-PWPM is fabricated in a 28 nm low-power CMOS technology and the circuit core dissipates 53mW from a 1 V supply. Sinusoidal double-sideband suppressed-carrier modulation of a 1 GHz carrier demonstrates the capability of the D-PWPM to operate as an RF bandpass mode DAC. With a carrier frequency of 983.04MHz, an SFDR of 45.6 dB is achieved for a low-frequency modulation and 33.4 dB near Nyquist frequency. Data transmission at 491.52MBit/s is demonstrated with a 16-QAM.
Keywords
"Clocks","Modulation","Layout","Logic gates","Switches","Pulse measurements","Power amplifiers"
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
Type
conf
DOI
10.1109/RFIC.2015.7337714
Filename
7337714
Link To Document