Design of ESD protection for large signal swing RF inputs operating to 24GHz in 0.18um SiGe BiCMOS process

The performance degradation resulting from the addition of ESD protection devices to very high speed Analog/RF designs is the main reason for low ESD robustness in these applications. This paper introduces an ESD methodology that combines device development and characterization as well as simulation, for high speed Analog/RF products. In this work a special ground referenced ESD network is introduced for protecting RF ports with asymmetrical signal swings in the range of +3.5V/−3.5V operating from 6– 24GHz.