Title :
A fully synthesized 0.4V 77dB SFDR reprogrammable SRMC filter using digital standard cells
Author :
Jun Liu;Ahmed Fahmy;Taewook Kim;Nima Maghari
Author_Institution :
University of Florida, Gainesville, FL 32611, USA
Abstract :
This paper presents a fully synthesized 0.4V analog Biquad filter in a 0.13μm technology using digital standard cells. A new fully reprogrammable multi-stage opamp array is introduced which can provide variable gain and bandwidth depending on the desired performance. In the proposed analog filter, all the active blocks such as the opamps and matched-RC duty-cycle generator are implemented using digital gates. This filter is implemented using Verilog code and synthesized using automated place and route. The prototype IC achieves 77.17dB peak SFDR and a tunable bandwidth of 1.7–2.5MHz while consuming 0.8mW power from a 0.4V analog supply and 1V supply for the switches.
Keywords :
"Decision support systems","Resistance","Clocks","CMOS integrated circuits","CMOS technology","Digital filters","Standards"
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2015 IEEE
DOI :
10.1109/CICC.2015.7338426