Title :
A Cartesian feedback-feedforward transmitter IC in 130nm CMOS
Author :
Sungmin Ock;Hyejeong Song;Ranjit Gharpurey
Author_Institution :
Department of Electrical and Computer Engineering, The University of Texas at Austin, TX, 78712, USA
Abstract :
A transmitter architecture based on Cartesian feedback-feedforward is described. A Cartesian feedback loop is used to linearize a transmitter and PA, and the error signal is utilized in a feedforward path to further enhance linearity. A proof-of-concept prototype transmitter IC that is used to linearize an external PA is demonstrated in a 130nm CMOS process. The implementation allows for a 8.7 dB ACLR improvement, compared to an open-loop transmitter, for an output power of 16.6 dBm at 2.4 GHz while employing a 16 QAM LTE signal with 1.4 MHz bandwidth.
Keywords :
"Feedforward neural networks","Linearity","Bandwidth","Prototypes","Integrated circuits","Distortion","Feedback loop"
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2015 IEEE
DOI :
10.1109/CICC.2015.7338483
