Design of high speed median filter based on neighborhood processor

Median filtering is a well-known method used in a wide range of application, especially for the removal of salt and pepper noise. It can reduce noise effectively while keeping the edges. Currently, existing algorithms give good results, but theirs efficiency need to be improved in some real-time applications. In this paper, we propose a neighborhood processor implementation of fixed size kernel median filters. Under the parallel pipeline structure of FPGA, this design applies all comparison sorting algorithm to realize the function of median filter. The experiments revealed that the standard median filter offers good performance and the system takes about 0.3ms to finish median filtering for a 256×256 image.