Effectiveness of matrix and pipeline FPGA-based arithmetic components of safety-related systems

The paper is devoted to design of the digital components for safety-related instrumentation and control systems using the modern CAD tools. Traditionally, the digital components are built with matrix parallelism that reduces fault tolerance of circuits and safety of systems in their checkability. Circuits with bitwise pipeline data processing have advantage in checkability, but are considered as less efficient. Matrix and pipeline methods for multiplying the numbers are compared with respect to the ratio of throughput to complexity. To estimate the relative effectiveness of these methods the resource approach is applied. The obtained estimations are verified experimentally using the multipliers realized on FPGA. Qualitatively, the expected and experimental estimations are consistent, and the reasons of their quantitative deviations are analyzed¹.