Title :
FPGA based architecture for realtime edge detection
Author :
P. Kalyan Chakravathi;K Vijaya Kumar;P. Devi Pradeep;D Suresh
Author_Institution :
Dept of ECE, GMR Institute of, Technology, Srikakulam, A.P.
fDate :
4/1/2015 12:00:00 AM
Abstract :
Edge Detection is one of the basic characteristics of the image. It is an important basis for the field of image analysis such as image segmentation, target area identification, extraction and other regional forms. The edge detection operators such as canny, sobel, prewitt operators detects the wide range of edges in image. These operators apply the convolution operation at each pixel to have gradient image. FPGA (Field programmable gate array) is fine grained reconfigurable architecture that can virtually perform any processing operation at a hardware level and satisfying real-time requirements for image processing. In FPGA hardware resources there are rich internal multipliers. The design process can directly call these resources to operate, so it is easy to implement complex convolution. FPGA based architecture for real time edge detection presents a new flexible parameterizable architecture which reduces latency and memory requirements. This architecture contains neighborhood extractors and threshold operators that can be parameterized at runtime. The algorithm simplifications reduces mathematical complexity, memory requirements, and latency without losing reliability. This architecture has clear advantage in terms of power consumption and maintain a reliable performance with noisy images.
Keywords :
"Image edge detection","Computer architecture","Detectors","Pipelines","Field programmable gate arrays","Real-time systems"
Conference_Titel :
Communication Technologies (GCCT), 2015 Global Conference on
DOI :
10.1109/GCCT.2015.7342615