• DocumentCode
    3706299
  • Title

    Hybrid III-V/SiGe technology: Improved n-FET performance and CMOS inverter characteristics

  • Author

    Lukas Czornomaz;Nicolas Daix;Daniele Caimi;Vladimir Djara;Emanuele Uccelli;Christophe Rossel;Chiara Marchiori;Marilyne Sousa;Jean Fompeyrine

  • Author_Institution
    IBM Zurich Research Laboratory, Sä
  • fYear
    2014
  • fDate
    6/1/2014 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Recently, hybrid III-V/SiGe CMOS circuits have been demonstrated. Reported InGaAs n-FET performance was severely degraded by the CMOS flow compared to reference devices processed individually. We report on the recovered n-FET performance and its impact on CMOS inverters. In addition, we study the influence of back-bias on short-channel effects immunity and inverter transfer characteristics.
  • Keywords
    "Indium gallium arsenide","CMOS integrated circuits","Inverters","CMOS process","Logic gates","Silicon germanium","Silicon"
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
  • Print_ISBN
    978-1-4799-5676-0
  • Type

    conf

  • DOI
    10.1109/SNW.2014.7348537
  • Filename
    7348537
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3706299