DocumentCode :
3706301
Title :
Bias-temperature instability in single-layer graphene field-effect transistors: A reliability challenge
Author :
Yu. Yu. Illarionov;A.D. Smith;S. Vaziri;M. Östling;T. Mueller;M.C. Lemme;T. Grasser
Author_Institution :
TU Wien, Austria
fYear :
2014
fDate :
6/1/2014 12:00:00 AM
Firstpage :
1
Lastpage :
2
Abstract :
We present a detailed analysis of the bias-temperature instability (BTI) of single-layer graphene field-effect transistors (GFETs). We demonstrate that the dynamics can be systematically studied when the degradation is expressed in terms of a Dirac point voltage shift. Under these prerequisites it is possible to understand and benchmark both NBTI and PBTI using models previously developed for Si technologies. In particular, we show that the capture/emission time (CET) map approach can be also applied to GFETs and that recovery in GFETs follows the same universal relaxation trend as their Si counterparts. While the measured defect densities can still be considerably larger than those known from Si technology, the dynamics of BTI are in general comparable, allowing for quantitative benchmarking of the graphene/dielectric interface quality.
Keywords :
"Stress","Silicon","Logic gates","Degradation","Graphene","Delays","Reliability"
Publisher :
ieee
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
Type :
conf
DOI :
10.1109/SNW.2014.7348539
Filename :
7348539
Link To Document :
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