DocumentCode :
3706306
Title :
Performance prospect of graphene barristor with high on-off ratio (∼107)
Author :
Jinwoo Noh;Kyoung Eun Chang;Chang Hoo Shim;Soyoung Kim;Byoung Hun Lee
Author_Institution :
Center for Emerging Electric Devices and Systems, School of Material Science and Engineering, Gwangju Institute of Science and Technology, Oryong-dong 1, Buk-gu, Gwangju, Korea, 500-712
fYear :
2014
fDate :
6/1/2014 12:00:00 AM
Firstpage :
1
Lastpage :
2
Abstract :
The graphene barristor is a promising device enabling high on-off ratio switching over 105 using a graphene FET. In this work, a semi-empirical device model for the graphene barristor has been developed using the physical parameters extracted from the graphene barristors fabricated on a lightly doped silicon substrate. Then, the ultimate performance limit and benefits of barristors were explored by varying the device parameters. The barristor showed a promising performance, but the scalability requires a creative solution for the device structure to maximize the current injection area.
Keywords :
"Graphene","Logic gates","Silicon","Performance evaluation","Modulation","Capacitance","Substrates"
Publisher :
ieee
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
Type :
conf
DOI :
10.1109/SNW.2014.7348544
Filename :
7348544
Link To Document :
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