Implementation of logic operations by charge sensing in SET quantum dots

We investigate the possibility to implement low-energy consuming binary logic gates by means of charge sensing in electrostatically defined quantum dots (QDs) formed in single electron transistors (SETs). In the proposed logic devices, the input signals are represented by the voltage levels at the SET´s gate electrodes, and the output is determined by the electrical current in the charge sensor (CS) circuit. In contrast to previous proposals of SET-based logic, the output signal does not depend on the electrical current through SET, but is defined by its charge configuration in the Coulomb blockade regime. Such a logic implementation suppresses the shot noise without increasing energy consumption.