Title :
Edge-states at the onset of a silicon trigate nanowire FET
Author :
B. Voisin;V.-H. Nguyen;J. Renard;X. Jehl;S. Barraud;F. Triozon;M. Vinet;I. Duchemin;Y.-M. Niquet;S. de Franceschi;M. Sanquer
Author_Institution :
INAC-SPSMS, CEA &
fDate :
6/1/2014 12:00:00 AM
Abstract :
We investigate the onset of the few-electron regime through the undoped channel of a silicon “trigate” nanowire FET [1]. Low-temperature conductance measurements together with self-consistent calculations reveal the formation of one-dimensional conduction modes localized at the two upper edges of the channel. This localization occurs from charge traps located in the gate dielectric, resulting in about 10 nm-long quantum dots. We observe single-electron tunneling across two parallel dots one in each channel edge. We find addition energies of a few tens of meV and level spacings of the order of 1meV, which we ascribe to the valley orbit splitting. Lifting the valley degeneracy leaves only a two-fold spin degenerate level, making edge quantum dots potentially promising candidates for silicon spin qubits.
Keywords :
"Logic gates","Silicon","Quantum dots","Temperature measurement","Dielectrics","Field effect transistors","Energy measurement"
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
DOI :
10.1109/SNW.2014.7348586