DocumentCode
3706361
Title
50 nm Alx Oy ReRAM array retention characteristics before and after endurance
Author
Hiroki Yamazawa;Sheyang Ning;Tomoko Ogura Iwasaki;Shuhei Tanakamaru;Koh Johguchi;Ken Takeuchi
Author_Institution
Dept. of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan
fYear
2014
fDate
6/1/2014 12:00:00 AM
Firstpage
1
Lastpage
2
Abstract
This work investigates resistive random access memory (ReRAM) data retention after different set/reset endurance cycles on a 50 nm Mega-bit-class AlxOy ReRAM array. The high resistance state (HRS) before forming and low resistance state (LRS) after forming show the best retention compared with after set/reset programming. When set/reset cycles increase, the LRS retention becomes better, whereas HRS retention gets worse, probably because the filament size becomes larger. Consequently, the retention time of ReRAM is degraded as the device is worn out and the error rate of HRS becomes dominant.
Keywords
"Resistance","Bit error rate","Arrays","Electrical resistance measurement","Yttrium","Temperature measurement","Random access memory"
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN
978-1-4799-5676-0
Type
conf
DOI
10.1109/SNW.2014.7348598
Filename
7348598
Link To Document