DocumentCode
3706373
Title
Novel tri-state latch using single-peak negative differential resistance devices
Author
Sunhae Shin;Kyung Rok Kim
Author_Institution
Electrical and Computer Engineering, Ulsan National Institute of Science and Technology, South Korea
fYear
2014
fDate
6/1/2014 12:00:00 AM
Firstpage
1
Lastpage
2
Abstract
We propose a novel tri-state latch based on single-peak MOS-NDR. By shifting peak voltage over half of the supply voltage, tri-state memory can be implemented. The fully suppressed valley current of MOS-NDR guarantees the supply voltage design margin in tri-state logic and memory.
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN
978-1-4799-5676-0
Type
conf
DOI
10.1109/SNW.2014.7348610
Filename
7348610
Link To Document