DocumentCode
3707061
Title
Design of Application Specific Throughput Processor for Matrix Operations
Author
Ping-Ju Wu;Chien-Yu Lin;Bo-Cheng Charles Lai
Author_Institution
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
fYear
2015
Firstpage
324
Lastpage
331
Abstract
In modern computation routines, matrix operations are broadly used in many scientific realms, ranging from high performance supercomputers to resource constrained embedded devices. Previous studies have revealed that the computation efficiency of matrix operations is significantly determined by the data accesses behavior of the computation platform. This paper introduces an integrated multicore system, including software stacks and hardware modules that can accelerate matrix operations and reduce data access overhead. With the proposed hardware module, the performance of our multicore embedded platform can improve up to 24.09%. Besides the hardware design, we also develop a framework that can facilitate the prototyping of embedded system designs, including functional verification of hardware modules as well as co-simulation with high level OpenCL language.
Keywords
"Hardware","Computational modeling","Memory management","Reduced instruction set computing","Throughput"
Publisher
ieee
Conference_Titel
Network-Based Information Systems (NBiS), 2015 18th International Conference on
Type
conf
DOI
10.1109/NBiS.2015.50
Filename
7350639
Link To Document