DocumentCode :
3708539
Title :
Review of NoC-based FPGAs architectures
Author :
Alaa Salaheldin;Karim Abdallah;Noha Gamal;Hassan Mostafa
Author_Institution :
Electronics and Communications Engineering Department, Cairo University, Giza 12613, Egypt
fYear :
2015
fDate :
3/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
4
Abstract :
Nowadays, FPGAs serve as Fields Programmable Systems on Chip (FPSoC) and are widely used to implement computationally intensive world applications. As the number of components in FPSoCs increases, the interconnect schemes based on Network on Chip (NoC) approach are increasingly used to overcome the problems of traditional bus based and point-to-point interconnect scheme. In this paper, we review several designs based on their contributions, architectures, implementations and future works. We also made our comparison between three of these routes to analyze the effect of varying the number of Virtual Channels (VCs), flit data width and buffer depth on the operating frequency, Logic Look-Up Tables (LUTs) and registers to help choosing the appropriate NoC based on system requirements.
Keywords :
"Table lookup","Field programmable gate arrays","Routing","Registers","Network topology","Ports (Computers)"
Publisher :
ieee
Conference_Titel :
Energy Aware Computing Systems & Applications (ICEAC), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICEAC.2015.7352172
Filename :
7352172
Link To Document :
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