DocumentCode :
3710163
Title :
The design of low power high gain transformer feedback amplifier
Author :
Suk-hui Lee;Ki-Jin Kim;K. H. Ahn;Sung-il Bang
Author_Institution :
Convergence Communication Components Research Center, Korea Electronics Technology Institute, Seongnam-si, South Korea
fYear :
2015
Firstpage :
129
Lastpage :
131
Abstract :
In this paper, we present a low power consumption and high gain low noise amplifier using transformer feedback to neutralize the gate-source overlap capacitance of a FET. It is a single-ended amplifier designed in 65nm CMOS technology for 60 GHz transceiver. This LNA achieves a simulated gain of 10.46 dB, noise figure of 3.216 dB at 60 GHz.
Keywords :
"Gain","CMOS integrated circuits","Logic gates","Noise figure","Inductors","Low-noise amplifiers","Bandwidth"
Publisher :
ieee
Conference_Titel :
Information and Communication Technology Convergence (ICTC), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICTC.2015.7354510
Filename :
7354510
Link To Document :
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