DocumentCode :
3710650
Title :
Investigation of the annealing time effects on Cu deposited CdTe thin films for photovoltaic application
Author :
K. S. Rahman;N. A. Khan;M. N. Imamzai;M. Akhtaruzzaman;K. Sopian;Z. A. Alothman;N. Amin
Author_Institution :
Department of Electrical, Electronic and Systems, Engineering, Faculty of Engineering and Built Environment, The National University of Malaysia, 43600 Bangi, Selangor, Malaysia
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
Firstly, Cadmium Telluride (CdTe) thin films have been deposited on cleaned soda lime glass substrates at 300°C by using the RF magnetron sputtering technique. After that, Cu thin film was deposited for 5 minutes at 200°C on top of CdCl2 treated CdTe thin films by sputtering. Subsequently, CdTe and Cu stacks were annealed at 400°C for 15 minutes, 20 minutes and 25 minutes in a vacuum furnace. The influence of different annealing times on the structural, topographical and electrical properties of Cu sputtered CdTe thin films were then examined by XRD, AFM and Hall Effect measurement, respectively. XRD patterns reveal that, one CdTe peak corresponding to the (111)cub reflection planes at 2θ=23.8o and another low intensity Cu2Te peak representing (200)hex hexagonal reflection planes at around 2θ=24.8o were found for all the annealing times. Surface roughness and topography were viewed from the AFM images. Noteworthy changes were observed in the films surface roughness due to the different annealing times. The surface roughness values imply rising trend for lower annealing times. Bulk carrier density was in the order of 1018cm-3. The highest carrier concentration of 7.1×1018cm-3 was achieved for the films annealed for 15 min.
Keywords :
"Annealing","II-VI semiconductor materials","Cadmium compounds","Sputtering","Films","Surface topography","Rough surfaces"
Publisher :
ieee
Conference_Titel :
Micro and Nanoelectronics (RSM), 2015 IEEE Regional Symposium on
Type :
conf
DOI :
10.1109/RSM.2015.7355006
Filename :
7355006
Link To Document :
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