DocumentCode :
3711431
Title :
Electrical conductivity across InP and GaAs wafer-bonded structures with miscut substrates
Author :
M. Seal;J. Mc Kay;M. Liao;M.S. Goorsky
Author_Institution :
University of California Los Angeles, 90095, United States
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
6
Abstract :
Low temperature direct bonding of InP and GaAs wafer combinations using an (NH4)2S treatment are investigated for the effect of out of plane misorientation on interface electrical conductivity. The Seager-Pike model is applied to the zero-bias conductance across a range of temperatures, revealing an increase in potential barrier height across all wafer combinations as the degree of surface misorientation is increased above 4°. This demonstrates that out-of-plane misorientation is a crucial parameter for direct-bonded homo and hetero structures where interface resistivity must be minimized, such as multijunction solar cells.
Keywords :
"Tunneling","Gallium arsenide","Electric potential","Manufacturing","Resistance"
Publisher :
ieee
Conference_Titel :
Photovoltaic Specialist Conference (PVSC), 2015 IEEE 42nd
Type :
conf
DOI :
10.1109/PVSC.2015.7356150
Filename :
7356150
Link To Document :
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