Title :
Memory design for selective error protection
Author :
Yanan Cao;Long Chen;Zhao Zhang
Author_Institution :
Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa, USA 50010
Abstract :
Memory error protection is increasingly important as memory density and capacity continue to scale. This paper presents a memory SEP (Selective Memory Protection) design that enables SEP for commodity memory modules, with no change to the modules or devices. Memory error protection is provided through embedded ECC, a recently proposed, energy-efficient ECC memory organization. The memory SEP design splits the physical memory address space into two memory regions of adjustable sizes, one with error protection and one without. With this support, the OS can adjust the size ratio of the protected region and non-protected region based on the needs of applications. In this scheme, the mapping from a physical memory address to memory device addresses is no longer power-of-two based. New and efficient address mapping schemes based on the Chinese Remainder Mapping are proposed to avoid the use of complex Euclidean division. The simulation results show that the memory SEP design may retain memory performance and cut memory power increase, while providing the ECC protection to commodity memory modules.
Keywords :
"Error correction codes","Random access memory","Computers","Electronic mail","Error analysis","Reliability","Simulation"
Conference_Titel :
Computer Design (ICCD), 2015 33rd IEEE International Conference on
DOI :
10.1109/ICCD.2015.7357094