DocumentCode :
3712400
Title :
Pool directory: Efficient coherence tracking with dynamic directory allocation in many-core systems
Author :
Sudhanshu Shukla;Mainak Chaudhuri
Author_Institution :
Department of Computer Science and Engineering, Indian Institute of Technology, Kanpur 208016, India
fYear :
2015
Firstpage :
557
Lastpage :
564
Abstract :
The coherence directory in a chip-multiprocessor keeps track of each memory block inside the cache hierarchy and plays a significant role in offering a scalable shared memory abstraction in many-core systems. Multi-threaded applications typically require two types of directory entries, namely, limited pointer entries tracking a few sharers of a block and bitvector entries tracking larger number of sharers for widely shared blocks. Recent proposals aiming to optimize the average number of bits per directory entry have organized the directory as either a static mix of these two types of entries or a collection of relatively short bitvector entries that can encode either a limited number of sharer pointers or a larger number of sharers hierarchically. In this paper, we present a directory organization that facilitates allocation of two different types of directory entries dynamically. Our design maintains a pool of limited pointer entries, where each entry can also double as a segment directory entry encoding the sharers in a cluster of cores. Each tag in the primary sparse directory array has a pointer that can either represent a sharer or point to an entry in the pool. When multiple segment directory entries are needed to encode all the sharers of a block, our pool management protocol guarantees that all these entries are allocated contiguously so that maintaining a pointer to the head entry is enough. Such a design offers significant flexibility in sharer encoding and allows us to independently size the sparse directory array and the pool. Detailed simulation results show that our proposal incorporated in a 128-core system running multi-threaded applications drawn from scientific, general-purpose, and commercial computing domains can offer, on average, 5% improvement in performance and 20% savings in interconnect traffic compared to the state-of-the-art scalable coherence directory (SCD) proposal when using a 1/16 × sparse directory.
Keywords :
"Proposals","Coherence","Organizations","Resource management","Protocols","Dynamic scheduling","Encoding"
Publisher :
ieee
Conference_Titel :
Computer Design (ICCD), 2015 33rd IEEE International Conference on
Type :
conf
DOI :
10.1109/ICCD.2015.7357165
Filename :
7357165
Link To Document :
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