• DocumentCode
    3712408
  • Title

    A one-pass test-selection method for maximizing test coverage

  • Author

    Cheng Xue;R. D. Shawn

  • Author_Institution
    Blanton ECE Department, Carnegie Mellon University Pittsburgh, PA, USA
  • fYear
    2015
  • Firstpage
    621
  • Lastpage
    628
  • Abstract
    Test selection aims at achieving high test quality with low test cost. By selecting only a subset of tests that most effectively detect defects, test time can be reduced while ensuring test escape is minimized. In this work, a new one-pass test-selection method is described that efficiently identifies tests that maximize either fault-model coverage or an N-detect test metric. The proposed method analyzes and selects each test one at a time in a streaming fashion to save both time and memory. The method is applied to two industrial designs, namely an IBM ASIC and an NVIDIA GPU. Experiment results demonstrate that the new method selects tests with coverage that virtually matches a greedy algorithm (less than 0.01% coverage difference), but uses less time (reduced by 2X) and memory (reduced by 20X to 200X). Additional experiments performed on two ISCAS circuits also demonstrates the new method typically achieves higher coverage but uses less time (reduced by 7X to 30X) and memory (reduced by 140X) as compared to selecting tests using a linear programming based approach.
  • Keywords
    "Circuit faults","Arrays","Greedy algorithms","Fault detection","Measurement","Memory management","Dictionaries"
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2015 33rd IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/ICCD.2015.7357173
  • Filename
    7357173