Low complexity memory architectures based on LDPC codes: Benefits and disadvantages

In this paper we investigate the problem of information storage in inherently unreliable memory cells. In order to increase the memory reliability, information is stored in memory cells as a codeword of a low-density parity-check (LDPC) code, while the memory content is updated periodically by an error correction scheme. We first present an overview on the state-of-the memory architectures based on LDPC codes, and then asses the benefits of using the coded architectures expressed through the increased reliability. In addition, we provide upper bounds on the complexity of such memories.